Digital System Design
Quiz by Dr. SRIDEVI SATHYA PRIYA 436
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10 questions
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- Q11+A2AA0130s
- Q2(A+B)'A'.B'(A.B)'(A)'.BA'+B'60s
- Q3In the clock pulse 0 to 1 transition is calledNegative EdgeRaising edgeFalling EdgePositive level60s
- Q4Express the Boolean function F = AB + B’C as standard sum of minterms(Canonical form).ABC+ABC'+AB'C+A'B'CABC+ABC'+AB'C+A'B'AB+AB'C+A'B'CABC+A'B'C'+B'C+A'B'C120s
- Q5Identify the Logic gate for the following truthtableEXORNANDEXNORNOR60s
- Q6Derive the Boolean expression for the logic circuit shown below((((A.B).C).D).E)((((A.B)+C)+D)+E)((((A+B)+C)+D)+E)((((A+B).C).D).E)120s
- Q7An AND gate with schematic "bubbles" on its inputs performs the same function as ________ gate.NANDNORXOROR120s
- Q8A truth table for the SOP expression ABC'+ABC+ A'B'C has how many input combinations?248360s
- Q9J-K flip-flop toggles ifJ=0 K=1J=1 K=0J=0 K=0J=1 K=160s
- Q10What does the triangle on the clock input of a T flip-flop mean?level trigger clockEdge trigger clock60s
