placeholder image to represent content

Registers

Quiz by Charmaine

Our brand new solo games combine with your quiz, on the same screen

Correct quiz answers unlock more play!

New Quizalize solo game modes
14 questions
Show answers
  • Q1
    Shift registers that are identified as parallel in/parallel out, serial in/parallel out, etc. are defined in this manner because:
    None of the above
    it indicates the manner in which data can be entered into the register for storage and the manner in which data are outputted from the register.
    it indicates the inverse of how data are entered into the register for storage and how data are outputted from the register.
    it indicates the manner in which data are stored in the register.
    45s
  • Q2
    Select the response that best defines the use of the Master Reset (MR) on typical counter ICs
    The MR is a synchronous active HIGH input that resets the counter to 0000 on the next input clock pulse.
    The MR is an asynchronous active HIGH input that resets the counter to the 0000 state.
    The MR is a synchronous active HIGH J-K input that resets the counter to 0000.
    The MR is an asynchronous active HIGH input that resets the counter to 0000 on the next clock pulse input.
    45s
  • Q3
    What type of register accepts data inputs one bit at a time and outputs all its data bits at the same time?
    Serial in/Parallel out
    Serial in/Serial out
    Parallel in/Serial out
    Parallel in/Parallel out
    45s
  • Q4
    A parallel in/parallel out register normally has data inputs loaded ________ and data outputs transferred ________.
    synchronously, asynchronously
    asynchronously, asynchronously
    asynchronously, synchronously
    synchronously, synchronously
    45s
  • Q5
    What data value(s) will be input to the register on the next clock if in=1 and out=1?
    Question Image
    11111111
    1
    0
    00000000
    120s
  • Q6
    How many Flip Flops are needed in a MOD-8 ring counter?
    4
    3
    8
    16
    45s
  • Q7
    How many Flip Flops are needed in a MOD-8 Johnson counter?
    4
    3
    16
    8
    45s
  • Q8
    Which shift-register counter requires the most FFs for a given MOD number?
    Ring Counter
    Asynchronous Binary Counter
    Synchronous Binary Counter
    Johnson Counter
    45s
  • Q9
    At a given time, the state of a 5-bit Ring Counter is 00001, what will the output be after 12 pulses?
    10000
    00001
    01101
    01000
    45s
  • Q10
    How many inputs are there to the AND gates that are used to decode a Johnson Counter?
    Depends on the MOD number of the counter
    2
    3
    Zero, a Johnson Counter doesn't need a decoder
    45s
  • Q11
    In a SISO (serial in/serial out) shift register, when SH/!LD = 1, what is the behavior of the data being input?
    The data will be parallel shifting through the register
    The data will parallel load into the register
    Nothing will happen- SH/!LD is disabled
    The data will be serial shifting through the register
    30s
  • Q12
    What are the next 3 states of a Johnson Counter with 6 flip flops (starting at 000000)?
    100000, 110000, 111000
    111111, 011111, 001111
    100000, 010000, 001000
    000001, 000010, 000011
    30s
  • Q13
    Apply the input waveform to a 74ALS166 and determine the output of QH (LSB) produced after the first clock (t0) and second (t1) pulses (PGT).
    Question Image
    1, 0
    1, 1
    0, 1
    0, 0
    120s
  • Q14
    Apply the input waveform to a 74ALS166 and determine the output of QH (LSB) produced at t11, t12 and t13.
    Question Image
    0, 1, 0
    0, 1, 1
    1, 0, 0
    0, 0, 0
    120s

Teachers give this quiz to your class