If the execute stage needs data from main memory (RAM), it will be loaded into which register temporarily?

A computer that runs stored programs using a fetch-decode-execute cycle is said to have what kind of architecture?

Which of these registers always holds addresses, never data?

The Address bus carries the address of which memory location needs to be read from or written to. Which register is used to set this up?

In the decode phase, the Control Unit determines what instruction needs to be carried out. Where is the binary code of the instruction it needs to decode?

The Von Neumann architecture uses several special-purpose data stores such as the MAR and Accumulator. What are these called?

In a CPU's instruction set,

LDA x means "Load accumulator with the contents of address x"

ADD #x means "Add the number x to the present content of the accumulator"

STA x means "Store the contents of the accumulator in address x"

If location 80 in RAM contains the value 15, what would be the contents of the memory address register after this set of instructions?

LDA 80

ADD #6

STA 81

The Data bus carries data and instructions between the CPU and the main memory (RAM). Which register temporarily holds the data being transferred?

Which of these is true about the Current Instruction Register (CIR)?

In the fetch phase of the instruction cycle, the address of the next instruction is placed in the MAR then the control unit signals a read operation using the control bus. What does MAR stand for?

When reading data from RAM or writing data back from RAM, which register holds the data temporarily?

The very first digital computers ran programs that were stored on paper tape or manually input via switches into a special program memory. What change did John Von Neumann propose that we still use today?

In a CPU's instruction set,

LDA x means "Load accumulator with the contents of address x"

ADD #x means "Add the number x to the present content of the accumulator"

STA x means "Store the contents of the accumulator in address x"

If location 80 in RAM contains the value 15, what would be stored in memory location 81 after this set of instructions?

LDA 80

ADD #6

STA 81

If the instruction being executed is an arithmetic or shift operation, which register will it change?

In a CPU's instruction set,

LDA x means "Load accumulator with the contents of address x"

ADD #x means "Add the number x to the present content of the accumulator"

STA x means "Store the contents of the accumulator in address x"

If location 80 in RAM contains the value 15, what would be the contents of the accumulator after this set of instructions?

LDA 80

ADD #6

STA 81

Which of these is not true about the Program Counter (PC)?

After it has been fetched from RAM, the instruction moves from the MDR into which register, before it is decoded and executed?

After fetching an instruction, which register is incremented so it holds the address of the next instruction in memory?

If the instruction being executed is a load operation, which register will the data be loaded into?

In the fetch phase, a binary instruction is fetched from RAM on the data bus. Which register stores the instruction temporarily?