Vonn Neumann architecture
Quiz by Гульсим Досанова
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- Q1
A single-directional bus that carries ... signals from the CPU to Main Memory and I/O devices
address bus
control bus
system bus
data bus
20s - Q2
What name is given to the first 4 bits of an instruction?
operand
opcode
20s - Q3
Alldata and instructions are stored in the
Secondary Storage
Hard Disk Drive
Register
Main Memory
20s - Q4
Instructionsare sent to the ... along the System Bus to be executed
I/O devices
Processor
Main Memory
20s - Q5
the section of high speed memory within the CPU that stores data to be processed
Main memory
cash
HDD
registers
20s - Q6
According to the fetch-decode-execute cycle the instruction is fetched from the ...
Program
Disk
Memory
CPU
20s - Q7
In which phase of the Fetch-decode-execute cycle the processor gets the memory address of the current instruction from the program counter PC
Decode Phase
Fetch Phase
Execute Phase
20s - Q8
In which phase of the Fetch-decode-execute cycle does the process of reading operand data in to the accumulator from the RAM take place?
Fetch phase
Decode phase
Execute phase
20s - Q9
In which phase of the Fetch-decode-execute cycle does the process of performing arithmetic on operand data take place?
Decode Phase
Execute Phase
Fetch Phase
20s - Q10
In which phase of the Fetch-decode-execute cycle does the process of performing logical functions(conditionals / loops) take place?
Fetch Phase
Execute Phase
Decode Phase
20s - Q11
In which phase of the Fetch-decode-execute cycle does the process of writing data from the accumulator to the RAM take place?
Decode Phase
Execute Phase
Fetch Phase
20s - Q12
In which phase of the Fetch-decode-execute cycle does the passing of data in the MDR is to the control unit (CU) take place?
Execute
Fetch
Decode
20s - Q13
In which phase of the Fetch-decode-execute cycle does the control unit (CU) signal to the ALU what instruction is to be completed?
Decode
Fetch
Execute
20s - Q14
In which phase of the Fetch-decode-execute cycle does the processor passes the address to the memory address register?
Execute
Fetch
Decode
20s - Q15
In which phase of the Fetch-decode-execute cycle does the processor sends the address along the address bus?
Decode
Fetch
Execute
20s